Intel’s Intel 4 Process Node aims to deliver 20% more performance and a 2x increase in density

At the IEEE’s annual VLSI Symposium, Intel has revealed a lot of new information about their upcoming lithography nodes. Specifically, Intel has released a lot of information about their new Intel 4 (formerly called 7nm) process technology, revealing it as Intel’s first node to make use of EUV (Extreme Ultra Violet) lithography technology.

When compared to today’s Intel 7 (formerly 10nm) lithography node, Intel 4 reportedly delivers 20+% ISO-power performance gains, and a 2x increase in high-performance logic library scaling. Basically, Intel’s Intel 4 node can deliver higher performance levels, greater levels of power efficiency, and increased silicon density. That’s great news for Intel. 

Intel 4 is due to be used first within Intel’s Meteor Lake processors, a multi-chip CPU design from Intel that will utilise the company’s advanced packaging technologies. 

While Intel’s brand-new Intel 4 node promised a 2x increase in transistor density over Intel 7, it deserves keeping in mind that this only relates to reasoning. Structures like SRAM see a smaller increase in silicon density, providing a 0.77 area reduction. SRAM plays a massive role in chip style, particularly when it involves caches, and also SRAM’s lower location decreases will certainly limit how much Intel will certainly be able to boost their cache sizes with their Intel 4 node.

Without EUV modern technology, Intel’s Intel 4 node would certainly call for more masks for etching and enhanced multi-patterning. Intel has actually approximated that EUV has lowered the variety of masks that they need by 20% when compared to Intel 7, reducing the intricacy of their Intel 4 node while accomplishing better outcomes.

Intel’s first Intel 4 products are due to launch in 2023 with Meteor Lake. Currently, we expect Meteor Lake to launch in late 2023, with Intel’s 13th Generation Raptor Lake processors arriving later this year.

By FYIPC

Leave a Reply

Your email address will not be published. Required fields are marked *